version 2, 21 July 2000 GFM
version 1, 11 June 2000 GFM
SCTDAQ is a project
by Peter Phillips, Gareth Moorhead and John Hill to profit from the development
by Martin Morrissey and Maurice Goodrick of the two VME modules
MuSTARD and
SLOG for
SCT readout and control.
Mustard and Slog were developed to supply multi-channel readout capability
for applications such as beamtest, systemtest, and hybrid and module production
testing in the period prior to the availability of ROD prototypes. This has evolved as
a project to provide ancillary hardware and a useful software environment to complement
these readout modules, providing a reasonably complete system for testing
both individual modules and hybrids and small systems of up to 6 or 12
hybrids and modules. This work commenced in late 1998 and has been
continually evolving since, with implementations tailored for the systemtests,
for testbeams at KEK and CERN, for single-event upset irradiation studies, and
for detailed characterisation of individual modules. Our approach
has been to provide general purpose components, both hardware and software, which can
be built into systems meeting specific requirements. The software is built
on the ROOT object-oriented physics analysis
package developed at CERN which among other things provides a C++
interpreter as its native scripting language, a feature we use to provide
macros for specific DAQ and analysis tasks.
This note discusses possible implementations with Mustard, Slog, SCTLV and SCTDAQ of multi-module production
test systems for hybrids and modules, one of the main applications originally
envisaged for Mustard and Slog. It does not disuss a priori the requirements
or specifications for such tests. In particular, it assumes the modularity of
6 or 12 modules implicit in the design of Mustard and Slog which each have
12 channels. It should be noted that larger systems can easily be
constructed (finances permitting) by using more Mustards and Slogs since from
the outset we followed coding conventions which allow for multiple
VME modules forming an arbitrarily large system (within the VME addressing constraints).
This has been demonstrated with a system for 12 modules in the June 2000 testbeam at CERN.
The multi-module production-test application is envisaged to be
routine, largely unattended, and technician or student operated,
for HV soak-testing, thermal cycling, or burn-in under operating
conditions to accelerate infant mortality of components.
The test software needs to be complete in the sense of exercising the
relevant circuits and functions for the duration of the test, robust
against failures, and provide diagnostics and standard test results.
Run macros for these functions need to be developed. As an example, a
small production centre might manufacture five modules a week, which could
then undergo a four- or five-day burn-in test cycle. This requirement
can be comfortably met with a six-module test station.
For detailed testing and characterisation of individual modules or hybrids
after major production steps (assembly, bonding, burn-in, transport etc.)
it is envisaged that labs would have a separate Mustard/Slog/SCTDAQ system so
as not to interrupt the unattended burn-in/soak system. This would
also be used for debugging in the re-work cycle. Since full characterisation
of a hybrid or module normally takes several hours, such a system should also
cope with a similar production rate.
Since the systems for multi-module soak/burn-in testing and detailed single
module characteristion are essentially identical, differing only in
ancillary components, a lab with both also has a degree of redundancy and commonality.
A basic SCTDAQ system consists of a Mustard and a Slog in a VME crate
connected via a National Instruments NI-VXI interface to a PC running ROOT.
Present implementations run under Windows NT or 95, but ROOT and SCTDAQ
are largely platform-independent and have also run under various flavours of
UNIX (linux, HP-UX etc.) for analysis. It should not be difficult to build an
online version for linux once drivers for the NI-VXI interface are available.
Ancillary hardware usually includes a
CLOAC prototype SCT
timing VME module for global clock, trigger and reset generation (essential in
applications with external triggers requiring clock synchronisation such as
beamtests, source or cosmic tests and perhaps laser scanning), and sufficient
SCTLV prototype SCT low-voltage modules for the number of
hybrids or modules in the system. Each SCTLV supplies low-voltage power,
control signals and current monitoring for two hybrids or modules, so that
s system of 6 modules would require 3 SCTLV units. Six fully-populated,
double-sided modules, with two sets of clock and control inputs and two
data outputs each, are supported by a one each of the 12-channel Mustard
and Slog in their simplest arrangement. Multiples of 6 modules
can be accommodated in the same architecture by multiple sets of Mustard, Slog
and three SCTLVs. Only one CLOAC is required in any system for global timing
of fast commands (triggers and resets). Modules must also interface to the
VME equipment, either via optical readout components as at the systemtests,
or by electrical repeater cards such as the SC99 support card.
Although in principle a module uses only one set of clock and control
inputs at any time (controlled by the SELECT low-voltage control signal),
complete testing requires connections to both sets of input. In the
systemtest and other applications with optical readout, switching between the two
input sets is done at the optical transmitter, eg, the
BiLED optical driver unit, so one SLOG can drive more
than six modules. In electrical readout systems using the existing
Melbourne
patch panel (PPR) and
support cards (SC99) , two sets of clock and control are connected to each
module, providing full test functionality but limiting each Slog in
the system to six modules.
A six-module electrical test stand for barrel modules in QMW-style
test boxes or hybrids connected to SC99 support cards can be itemised
as follows, and has already basic software support for testing multiple modules:
- 1 CLOAC
- 1 SLOG (12 clock and control links out, two sets per module for both
redundancy options)
- 1 MuSTARD (12 data links in, two per module)
- 1 PPR2 Patch Panel (connecting to 6 16-way twisted pair signal cables)
- 3 SCTLV2 (2 sets each of low-voltage power and control connecting to SCT standard
25-way conventional cables)
- 6 Support or repeater cards, one per module or hybrid, eg,
SC99-QMW repeater cards (for modules in QMW boxes) or
SC99 support cards for barrel hybrids on support cards, or
FWDLVDS repeater cards for forward modules or hybrids (without opto chips),
all connecting via standard cables to PPR2 and SCTLV.
Implementation of systems for multiples of 6 modules using such equipment sets
is straight forward, and already demonstrated in the testbeam. However, it may
not be practical to acquire duplicates of the more expensive VME modules.
Options for more cost-effective solutions for more than six modules are discussed
below.
Caveats
- Not listed above are
HV supply, HV monitoring, monitoring of
hybrid thermistor temperatures, or any kind of environment control or
monitoring. This is for several reasons:
- Prototypes of the SCT HV and DCS equipment are not yet available
or not yet available in significant numbers, although they are foreseen.
These may turn out to be cost-effective solutions for production centres
as well as operations (testbeam, systemtests etc.) Integration of the
first version of DCS for temperature monitoring into SCTDAQ
is expected very soon for the systemtest.
- HV and temperature monitoring can already be connected very simply via
the transfer lines implemented in SCTLV to any equipment available,
and do not require any special characteristics for SCT.
- Financial constraints mean that many labs will want to use
their already existing multi-channel HV and environment systems,
a viable option for the preceding reason.
- A good solution for electrical readout of
forward modules with DORIC and VDC
on the hybrid, does not yet exist, though several interim solutions for
readout of hybrids without DORIC and VDC bonded have been
widely used. More discussion below .
- Mustard and Slog, and therefore SCTDAQ, do not provide for
"corner" testing of certain operating parameters, for example,
LVDS drive amplitudes or clock frequency acceptance. Some parameters,
for example chip low voltages or trigger rates, can be tested.
Those corner parameters not able to be tested at present with Mustard/Slog/SCTLV
are tested for each chip at the wafer level using the specialised system
developed at LBL. Detailed discussion of the requirements for hybrid and
module corner testing, either in single- or multi-module stations,
are underway (July 2000 QA/QC meetings): see for example the note [ref?]
by Martin Morrissey. It is hoped that corner testing requirements can
be met with Mustard/Slog/SCTLV and perhaps a more complex support card.
Several options exist to reduce the cost of systems of more than 6 modules,
such as might be required at larger production centres that do not
want to purchase more than two Mustard/Slog systems (one each for their
multi-module and detailed single-module test stands). However, there
are some observations which can be made:
Firstly, there is not much to be gained at the low-voltage side,
since SCTLV provides all the necessary specialised supply voltages,
current monitoring and control voltages in a cost-effective way.
Secondly, support or repeater cards are inexpensive items,
around CHF120 per module at present. While simplifications might be
achieved through placing the circuitry for multiple modules
on one PCB, most of the cost is in the components. The natural
geometry for a stack of modules is at right-angles to the orientation
of their connectors, so intermediate cables would in any case
be required. It may prove that such a solution is favoured for mechanical
or thermal control reasons, but it is unlikely to be cheaper.
Some saving can be made with SLOG, which has 12 clock and control
channels. A minor variation in the repeater card design, with
no cost penalty, would allow use of the SELECT control line
to switch a single set of clock and control supplied to either
of the two sets of module clock and control inputs. This
would allow full redundancy testing of 12 modules from one SLOG
at no extra cost. New PPR and SCs would need to be designed
and purchased.
A significant cost in the SCTDAQ hardware collection is the MuSTARD.
For detailed module characterisation, and most other applications
of SCTDAQ (beamtest, systemtest etc.) simultaneous monitoring
of both data links of all modules is essential. However, for
soak/burn-in type testing, it may be that occasional or cyclic
monitoring is sufficient. If cyclic monitoring is deemed acceptable, then one
can envisage multiplexing the LVDS signals from many modules
to Mustard. A particularly simple case, requiring only one
control bit, would be to switch between two sets of 12 data links,
allowing 12 modules to be cyclically monitored. This should
cater to the requirements of larger production centres.
This could be achieved by daisy-chaining pairs of support cards,
or "twinning" modules onto one support card per pair, or by
having a switching board at the VME side, replacing the passive
patch panel. If the switching occurred at the support card, it could be
controlled (in the case of barrel modules) by an unused SCTLV low-voltage
line intended for the opto-harness, or it could be derived from the
SELECT state changes controlling a flip-flop (which would be reset by
RESET to ensure it was tracked by the controller). If more
extensive corner testing requires that a more complex support card
be designed, then such concerns can be addressed in a common design.
Existing solutions for forward modules without
opto chips bonded (DORIC and VDC) include:
- Connecting at the end of the module, in-line with it, to a standard
SC99 barrel support card using the small Frieburg patch card. This works
well, but is mechanically very dangerous, since the rigid patch
cards connects the support card (with cables) to the very fragile hybrid.
- A prototype repeater card (FWDLVDS) has been made in Melbourne
for connecting the long kaptons designed by Tony Smith to the
normal LVDS repeater circuitry. This works, but has not yet (June 2000)
been manufactured in quantity because the requirements for readout
of hybrids with opto chips bonded have not yet been defined.
As an extra feature, this card will in future be manufactured to be
compatible with the well-cooled forward module testbox which has
been designed by Richard Fortin at CERN.
An important question for forward multi-module testing is whether
or not it is necessary to include the DORIC and VDC in the test chain
during the long-term multi-module testing, or whether electrical
tests of the rest of the system are sufficient, with tests of the
opto chips before and after burn-in. It is always possible
to supply clock and control electrically to a forward hybrid
using its LVDS redundancy inputs; it should be possible to read
the data out electrically without disturbing VDC by monitoring
the SPY connector with some kind of high-impedance receiver. This
possibility is currently under active investigation but is not
yet demonstrated.
If it is determined to be a requirement for soak/burn-in that
DORIC and VDC must be tested during the long-term cycle, then
several solutions may be available:
- Optical readout is always a possibility, limited financial
constraints and by the availablilty of parts, especially
opto-packages. Several optical interface options for the back-end
electronics interface to Mustard and SLOG exist and are available to
production centres, including the solutions developed at NIKHEF
(Fred Hartjes) and at Cambridge (OPTIF).
- Pseudo-optical readout. This has been demonstrated at Liverpool,
using a development of a specially designed Melbourne forward support
card (FWDOPTO) connecting to the hybrid via Tony Smith's kaptons.
Pseudo-optical readout is defined to be an electrical emulation of
the opto-plugin, i.e., circuits which emulate the by-phase-mark-encoded
clock and control current normally originating at the PIN receiver
on the opto-package, and the VCSEL drive currents from the VDC
into the opto-package. This requires a considerably more complex
repeater card than does simple LVDS readout, but may well
be a cheaper and more convenient solution than true optical readout.
A generic interface to an external DCS process, for example a
LabVIEW session running on the same or a different PC, does not
yet exist. Both ROOT and LabVIEW provide simple TCP/IP
socket connectivity which will be investigated shortly.
To do: list open questions already discussed.
suggestions/corrections