Summary of the noise measurements done by Martin Morrissey, Jan Stastny, Lars Eklund and Szymon Gadomski system test sector prototype, CGNT1 module, optical readout, 13-16 December 1999 The influence of various power and ground arrangements on the noise of the single module was investigated. The record of all the combinations that were tried is appended below. The measurements can be summarized as follows: * It is advisable to use ferrite low pass filters (common mode chokes) on the power and sensing lines when using SCTLV power supplies. The power supplies were meant to be used with filtering. * Without the choke the most recent SCTLV produces less noise than the previous model. With the choke there is no difference. * Without the choke running the SCTLV outside of the VME crate results in less noise, with the choke again there is no difference. * Grounding of the module to the cooling pipe appears to help even in case of the single module. Connecting the screen of the long conventional cable to either analog or digital ground appears to help as well. * Screening of the module from the power tapes by a sheet of aluminum is helpful too. * Using the choke, the ground connection and the screening it is possible to reduce the noise from CGNT1 to around 1600 electrons. The best result obtained with the bench top power supplies is about 140 electrons lower for the module on the sector. Differences in the analysis and in the data taking mode (edge detection ON and OFF) can produce systematic variations of the order of 100 electrons in the measured level of noise. This should be kept in mind when comparing results obtained at different setups. The figures quoted above were measured at the same setup and using an identical procedure. This summary has been typed by SG, approved and corrected by MM and JS The log: -------- Mon 13 Dec SCTLV powering the module, the other one disconnected Summary Data Chip Gain g_err Offset o_err Noise n_err 0 97.30 1.56 51.65 6.12 3141 94 1 102.60 1.84 51.79 9.29 2965 53 2 87.81 1.88 66.93 8.11 3108 67 3 81.90 2.05 70.11 8.29 3610 78 4 79.91 2.56 84.76 6.75 3840 135 5 88.46 1.45 71.53 7.46 3338 127 mV/fC mV ENC Chip Gain g_err Offset o_err Noise n_err 0 97.27 2.65 47.87 7.33 3123 98 1 103.14 1.98 46.80 9.49 2943 60 2 88.55 1.75 61.43 6.52 3074 93 3 82.48 1.89 67.57 7.68 3599 88 4 80.15 1.85 81.79 6.80 3794 83 5 89.03 1.64 66.56 5.98 3314 143 mV/fC mV ENC New power sopply, 3.6 V 4.1 V Chip Gain g_err Offset o_err Noise n_err 0 109.19 1.84 28.22 7.41 2572 77 1 114.14 1.82 30.70 9.01 2464 41 2 99.64 1.69 41.46 9.28 2547 94 3 94.64 2.60 41.58 9.03 2903 69 4 90.89 3.47 59.31 7.11 3140 91 5 100.15 1.63 48.23 7.30 2783 124 mV/fC mV ENC back to 3.5 and 4.0 V Chip Gain g_err Offset o_err Noise n_err 0 100.96 2.16 34.55 7.85 2789 110 1 106.92 2.26 31.97 10.20 2633 53 2 91.63 2.31 48.79 6.61 2774 99 3 85.12 2.00 54.24 9.40 3233 62 4 83.07 2.29 68.79 6.45 3442 92 5 92.62 1.99 53.78 5.75 3045 152 mV/fC mV ENC power supply powered from bench top supplies, otside the crate Chip Gain g_err Offset o_err Noise n_err 0 112.25 2.14 21.62 6.62 2314 77 1 117.01 2.06 23.53 8.96 2196 32 2 102.66 1.99 34.06 10.23 2239 58 3 97.62 3.06 33.28 9.41 2553 60 4 94.01 3.67 50.00 7.58 2726 89 5 103.60 1.83 39.50 8.25 2411 108 mV/fC mV ENC short cables, same power supply anaysis doesnt really work anymore fixed Chip Gain g_err Offset o_err Noise n_err 0 108.42 2.32 41.36 6.67 2597 63 1 112.32 1.89 45.65 10.29 2509 40 2 98.85 1.89 56.31 12.27 2577 50 3 97.37 2.81 42.48 9.97 2857 67 4 93.26 3.12 59.83 7.27 3093 76 5 99.45 1.77 59.33 8.44 2801 90 mV/fC mV ENC Tuesday 14 Dec, repeating the same measurement Chip Gain g_err Offset o_err Noise n_err 0 110.47 2.11 29.75 6.82 2642 70 1 114.94 2.17 32.30 10.87 2545 43 2 99.76 2.25 42.70 11.24 2651 59 3 95.18 2.72 42.54 9.32 2992 62 4 91.88 3.59 58.72 6.38 3215 89 5 100.78 1.99 48.74 6.31 2860 107 mV/fC mV ENC bench top power supplies powering the module and the opto Chip Gain g_err Offset o_err Noise n_err 0 114.17 1.83 27.26 6.68 1896 59 1 117.34 1.88 31.16 10.13 1808 29 2 104.57 1.92 41.28 12.62 1803 38 3 103.56 2.71 26.31 9.16 1967 43 4 99.48 3.05 43.74 6.99 2101 67 5 105.57 1.92 43.26 8.77 1889 46 mV/fC mV ENC Vcc reduced to 3.5 V using sense wires, (was reading 3.62-3.64 before) Chip Gain g_err Offset o_err Noise n_err 0 115.30 1.71 16.05 6.21 1853 55 1 118.54 1.89 21.13 10.20 1767 28 2 106.04 1.90 30.01 10.96 1756 43 3 103.10 2.83 20.00 9.04 1937 56 4 99.79 3.55 36.37 8.11 2058 71 5 107.15 1.66 32.03 7.33 1827 47 mV/fC mV ENC Vdd reduced to 3.99 V using sense (was 4.17) Chip Gain g_err Offset o_err Noise n_err 0 101.44 3.41 30.18 8.26 2098 78 1 107.42 2.26 26.73 9.01 1961 51 2 91.16 2.91 46.49 7.52 2052 70 3 83.45 2.24 54.72 9.86 2372 54 4 82.23 2.43 66.05 6.33 2435 77 5 93.54 2.55 46.32 6.90 2081 65 mV/fC mV ENC Back to crate, new SCTLV, 3.5 and 4.0 V Chip Gain g_err Offset o_err Noise n_err 0 102.71 2.44 32.34 7.63 2751 96 1 107.78 2.00 30.69 9.37 2588 69 2 92.26 2.91 46.81 6.56 2748 89 3 85.77 2.59 53.64 9.20 3212 70 4 83.83 2.54 66.17 6.40 3400 102 5 94.50 2.15 49.77 5.26 2965 143 mV/fC mV ENC Using a choke with ferrites next to the SCTLV Chip Gain g_err Offset o_err Noise n_err 0 105.90 2.61 28.31 7.39 2217 73 1 110.50 2.13 29.30 9.19 2089 40 2 95.74 2.15 41.73 8.77 2156 55 3 88.71 3.20 45.19 9.02 2481 49 4 86.54 3.23 59.09 7.67 2598 93 5 96.93 1.99 46.07 5.82 2286 89 mV/fC mV ENC Same choke moved to the patch panel end of cable Chip Gain g_err Offset o_err Noise n_err 0 102.54 2.26 43.09 7.13 2187 69 1 105.63 2.21 47.01 9.22 2097 40 2 91.64 2.45 60.76 11.47 2178 61 3 86.97 2.44 55.31 9.83 2433 53 4 84.32 2.68 68.47 6.46 2561 65 5 92.63 2.03 61.80 5.46 2296 81 mV/fC mV ENC same as above, but voltage to 3.6 and 4.1 V Chip Gain g_err Offset o_err Noise n_err 0 113.23 2.34 19.86 6.93 1972 60 1 117.09 2.23 23.06 10.04 1902 36 2 103.13 2.13 34.24 10.31 1915 51 3 98.08 3.50 30.63 9.62 2160 50 4 94.91 4.20 47.48 8.22 2303 92 5 104.16 2.07 39.35 8.26 2049 66 mV/fC mV ENC power supplu moved out of the crate Chip Gain g_err Offset o_err Noise n_err 0 113.06 2.01 25.32 6.64 1925 55 1 116.72 2.19 29.05 10.07 1843 31 2 103.13 1.88 40.13 10.95 1860 42 3 99.73 2.23 30.31 9.70 2068 55 4 96.30 3.82 47.63 7.80 2209 76 5 104.12 1.92 42.61 7.68 1957 62 mV/fC mV ENC power to patch panel slot 1 Chip Gain g_err Offset o_err Noise n_err 0 114.76 2.22 17.19 6.62 2592 81 1 118.34 2.36 20.94 10.53 2470 44 2 103.88 2.20 29.40 10.63 2526 58 3 99.18 3.59 27.86 10.14 2840 89 4 95.97 3.88 44.74 8.17 3020 94 5 105.17 2.14 35.63 6.70 2738 120 mV/fC mV ENC power removed from pp slot 1 new SCTLV out of crate and with short cables and choke Chip Gain g_err Offset o_err Noise n_err 0 108.51 2.08 40.56 6.66 1971 53 1 111.79 1.89 45.87 10.00 1899 36 2 98.60 1.92 57.76 11.78 1917 39 3 97.09 2.72 42.40 11.35 2108 47 4 92.73 3.44 58.40 7.42 2256 61 5 99.45 2.06 59.25 7.40 2010 50 mV/fC mV ENC new SCTLV out of crate and with short cables and NO choke (test of reproducibility) Chip Gain g_err Offset o_err Noise n_err 0 112.03 2.51 26.20 6.83 2587 56 1 116.19 1.97 31.05 9.92 2520 39 2 101.79 2.05 39.45 12.48 2570 41 3 97.97 2.93 35.83 8.97 2912 63 4 94.46 3.38 52.48 6.09 3159 97 5 102.81 1.89 46.42 8.35 2802 84 mV/fC mV ENC after a session of screen picture taking, back to scans SCTLV out of crate and with short cables, choke connected, analogue ground connected to the cooling pipe Chip Gain g_err Offset o_err Noise n_err 0 111.84 2.36 28.01 6.65 1861 47 1 115.51 2.10 32.17 9.84 1811 33 2 101.89 1.99 43.00 10.01 1813 58 3 98.21 3.23 34.84 9.24 2019 50 4 94.92 3.54 51.24 7.16 2117 61 5 103.06 2.00 44.81 7.51 1859 44 mV/fC mV ENC 15-dec-99 do scan without any change Chip Gain g_err Offset o_err Noise n_err 0 110.91 2.58 28.15 6.58 1943 56 1 115.09 2.08 32.90 9.60 1873 28 2 102.15 2.01 41.50 13.20 1862 38 3 98.15 3.09 34.69 9.19 2048 46 4 94.12 3.99 51.99 7.92 2163 62 5 102.96 1.96 43.85 7.94 1917 32 mV/fC mV ENC repeat the scan after reducing detector current 6 microA to 2 microA by reducing light Chip Gain g_err Offset o_err Noise n_err 0 112.93 2.68 20.80 7.67 1880 53 1 117.33 2.02 23.28 9.13 1841 7 2 103.22 1.84 34.37 10.07 1813 47 3 97.67 3.56 32.14 9.85 2033 56 4 94.48 4.18 48.66 7.09 2141 71 5 136.65 22.17 38.75 8.22 1868 33 mV/fC mV ENC same, with long cables Chip Gain g_err Offset o_err Noise n_err 0 109.55 2.09 37.00 6.93 1920 51 1 112.75 2.08 42.87 9.51 1851 30 2 99.18 1.91 51.41 10.68 1878 51 3 96.58 3.28 40.77 9.19 2078 42 4 93.29 4.08 57.60 7.84 2202 57 5 100.48 2.00 55.02 8.66 1954 51 mV/fC mV ENC same, with extra black plastic. detector current 1.3 microA Chip Gain g_err Offset o_err Noise n_err 0 113.64 2.35 17.51 6.64 1843 56 1 118.10 2.19 21.08 8.37 1762 27 2 103.52 1.79 32.43 9.59 1784 34 3 97.80 2.95 31.72 9.91 1999 46 4 94.18 4.29 49.06 7.81 2111 81 5 104.60 1.92 36.82 6.80 1835 41 mV/fC mV ENC as above with conventional cable screen connected to analog ground at SCTLV output Chip Gain g_err Offset o_err Noise n_err 0 111.31 2.21 28.24 6.50 1854 50 1 115.14 1.92 33.99 9.01 1781 27 2 100.74 1.98 43.03 10.72 1809 44 3 97.76 2.99 35.97 8.97 1999 43 4 93.88 3.92 52.24 10.03 2112 60 5 102.09 1.80 47.46 7.10 1863 37 mV/fC mV ENC screen connected to agnd at patch panel end Chip Gain g_err Offset o_err Noise n_err 0 105.15 1.97 56.16 7.16 1883 47 1 108.03 1.95 63.83 9.27 1810 34 2 93.96 2.04 75.35 12.73 1863 43 3 93.48 2.50 58.19 10.70 2066 43 4 89.36 3.13 74.67 8.21 2200 66 5 94.72 1.92 76.96 8.97 1945 37 mV/fC mV ENC above repeated Chip Gain g_err Offset o_err Noise n_err 0 113.63 2.32 19.59 6.42 1827 48 1 117.49 2.19 21.85 9.42 1755 33 2 103.46 2.16 31.60 11.27 1766 45 3 97.78 3.80 30.12 9.97 1980 42 4 94.55 4.40 48.42 8.65 2098 77 5 104.74 2.18 36.15 6.88 1821 39 mV/fC mV ENC with sctlv in vme crate! Chip Gain g_err Offset o_err Noise n_err 0 111.47 1.77 30.01 7.04 1838 54 1 114.83 1.96 33.95 9.94 1775 28 2 101.57 1.90 45.10 10.99 1779 48 3 98.81 3.01 33.46 9.13 1977 43 4 94.90 3.98 50.02 7.72 2088 63 5 102.72 1.84 45.68 9.02 1845 48 mV/fC mV ENC as above, with screening under module Chip Gain g_err Offset o_err Noise n_err 0 110.98 1.75 26.20 6.03 1753 49 1 114.82 2.04 29.52 9.37 1670 31 2 100.40 2.23 41.42 9.67 1679 48 3 95.81 3.15 37.03 9.07 1875 44 4 92.01 3.85 53.47 7.56 1971 64 5 102.42 1.84 42.50 7.07 1685 40 mV/fC mV ENC repeated after lunch Chip Gain g_err Offset o_err Noise n_err 0 111.19 3.54 13.57 7.69 1716 52 1 117.43 2.41 13.64 8.46 1625 35 2 101.39 3.00 29.85 8.09 1651 53 3 93.02 3.11 36.59 10.23 1909 55 4 89.75 4.46 53.25 9.30 1991 70 5 103.42 2.30 31.91 6.74 1646 38 mV/fC mV ENC edge detect ON, no compression Chip Gain g_err Offset o_err Noise n_err 0 109.08 1.73 57.34 7.53 1595 46 1 113.17 1.96 55.94 10.18 1538 30 2 103.23 1.68 62.68 14.32 1446 32 3 107.86 2.24 39.87 11.55 1511 33 4 105.98 2.51 50.67 8.22 1583 39 5 92.34 15.06 54.56 10.10 1477 25 mV/fC mV ENC data compression set to 2 (01X) delay set to 30 Chip Gain g_err Offset o_err Noise n_err 0 112.49 2.09 43.75 7.00 1602 31 1 116.36 2.01 44.75 11.12 1551 22 2 106.89 2.07 46.38 15.54 1464 31 3 111.88 2.15 28.16 13.17 1523 33 4 110.37 2.26 37.34 11.61 1604 35 5 108.54 1.94 46.16 9.54 1525 29 mV/fC mV ENC choke added to the detector bias and return cables Chip Gain g_err Offset o_err Noise n_err 0 107.67 2.15 62.71 7.66 1637 34 1 111.62 2.00 62.90 9.72 1589 27 2 100.85 1.83 72.37 13.67 1519 29 3 105.80 2.26 50.21 11.09 1588 36 4 103.84 2.22 60.68 9.42 1667 47 5 103.29 2.10 66.18 9.24 1582 25 mV/fC mV ENC 2nd power supply (not active) connected to PP1 Chip Gain g_err Offset o_err Noise n_err 0 112.19 2.19 46.32 7.38 1752 48 1 116.16 1.91 46.48 10.62 1691 26 2 106.46 2.04 51.16 14.40 1596 36 3 111.43 2.25 30.41 11.55 1669 29 4 109.69 2.22 40.05 10.89 1757 46 5 108.05 1.97 47.25 9.58 1686 31 mV/fC mV ENC all SCTLV disconnected from the patch panel, bench top supply connected, reproducing 3.6 and 4.1 V on chip by probing sense wires Chip Gain g_err Offset o_err Noise n_err 0 108.85 1.90 52.61 7.37 1596 39 1 112.95 1.89 50.46 10.27 1544 32 2 103.17 1.82 59.32 11.88 1468 31 3 107.40 2.24 37.01 11.91 1528 36 4 105.71 2.04 48.16 11.47 1616 45 5 104.86 1.82 54.09 8.73 1522 26 mV/fC mV ENC same, but unactive SCTLV connected to PP1 Chip Gain g_err Offset o_err Noise n_err 0 111.47 1.77 42.84 7.36 1626 37 1 115.27 2.08 42.11 10.43 1578 27 2 106.15 2.01 48.04 13.50 1490 33 3 110.74 2.19 28.06 11.92 1550 32 4 108.83 2.34 38.77 11.77 1645 41 5 107.51 1.96 44.07 8.98 1551 28 mV/fC mV ENC module still on bench supply, Vdd slightly increased (to 4.2 V) to compensate for increas of current during data taking; new SCTLV with choke and turned on is connected to PP1 Chip Gain g_err Offset o_err Noise n_err 0 111.89 2.20 46.45 7.17 1589 34 1 115.67 2.15 45.82 10.81 1544 30 2 105.89 1.99 53.11 14.53 1464 32 3 110.97 2.03 32.64 13.17 1523 33 4 108.82 2.52 42.28 11.09 1612 43 5 107.84 1.95 49.06 9.70 1519 28 mV/fC mV ENC SCTLV powering the module, still are 3.6 and 4.1, nothing else connected to the PP, groundind wire to AGND Chip Gain g_err Offset o_err Noise n_err 0 112.08 2.21 45.89 7.66 1757 31 1 116.13 1.92 46.31 10.37 1737 24 2 106.47 2.27 54.30 15.98 1654 33 3 111.62 2.00 30.34 10.75 1728 28 4 109.83 2.29 42.15 11.57 1817 40 5 107.94 2.18 47.72 7.20 1743 34 mV/fC mV ENC grounding wire to DGND Chip Gain g_err Offset o_err Noise n_err 0 110.38 1.82 53.72 7.29 1664 42 1 114.38 2.10 51.85 11.70 1612 28 2 103.97 1.96 58.65 14.01 1528 31 3 108.68 2.00 39.51 13.25 1595 28 4 106.74 2.32 51.40 10.98 1681 41 5 105.69 1.91 56.65 9.04 1591 28 mV/fC mV ENC power to module changed to Vcc = 3.5 and Vdd = 4.0 V Chip Gain g_err Offset o_err Noise n_err 0 112.87 1.88 39.13 7.40 1637 39 1 116.75 1.99 38.80 10.23 1581 27 2 107.25 1.85 43.84 17.45 1493 34 3 112.14 2.06 20.26 11.95 1554 34 4 110.45 2.09 32.13 11.80 1634 38 5 108.75 1.85 40.36 8.14 1549 32 mV/fC mV ENC 16-dec-99 repeat last scan Chip Gain g_err Offset o_err Noise n_err 0 108.92 1.78 53.88 7.74 1773 34 1 113.01 1.95 51.79 10.04 1725 28 2 103.25 1.85 56.54 14.22 1650 33 3 108.11 2.34 37.26 12.76 1718 35 4 106.29 2.04 47.52 11.35 1792 46 5 105.25 1.93 54.34 8.95 1689 27 mV/fC mV ENC scan repeated Chip Gain g_err Offset o_err Noise n_err 0 112.70 1.87 39.70 8.25 1715 38 1 116.24 1.88 40.05 10.78 1663 31 2 107.46 1.77 40.79 15.52 1579 31 3 112.14 2.06 21.46 11.25 1648 34 4 110.54 2.32 32.24 12.43 1729 40 5 108.72 1.99 41.74 10.00 1629 24 mV/fC mV ENC scan repeated Chip Gain g_err Offset o_err Noise n_err 0 112.97 1.76 38.34 6.60 1699 41 1 116.79 2.14 38.68 10.45 1642 28 2 107.18 2.28 42.23 15.65 1564 30 3 112.59 2.20 19.95 12.83 1628 38 4 110.85 2.06 30.88 12.54 1714 37 5 108.94 1.78 39.41 9.12 1621 30 mV/fC mV ENC replace new SCTLV with old, edge detect with any hit Chip Gain g_err Offset o_err Noise n_err 0 108.42 2.11 55.16 6.57 1704 35 1 111.76 1.88 56.88 10.70 1667 26 2 101.36 1.62 64.77 11.92 1591 35 3 104.59 1.75 49.82 11.74 1684 38 4 102.63 1.94 62.40 8.98 1780 55 5 102.67 1.73 63.88 8.29 1681 30 mV/fC mV ENC as above but with edge compression mode Chip Gain g_err Offset o_err Noise n_err 0 111.67 2.15 44.15 6.66 1671 30 1 115.40 2.14 44.05 9.64 1623 28 2 106.23 1.92 46.35 13.93 1529 26 3 111.27 2.17 27.36 12.55 1599 30 4 109.35 2.53 38.54 11.23 1686 49 5 107.74 1.87 47.06 9.62 1600 28 mV/fC mV ENC conventional cable screen connected to dgnd at pp end Chip Gain g_err Offset o_err Noise n_err 0 110.31 1.78 50.93 6.65 1669 39 1 113.74 1.82 50.65 9.79 1627 26 2 103.82 1.90 58.23 14.24 1547 28 3 108.28 2.05 36.93 12.33 1612 29 4 106.88 1.90 47.20 10.29 1701 45 5 105.28 1.84 54.73 7.88 1622 28 mV/fC mV ENC VDD = 3.8V Chip Gain g_err Offset o_err Noise n_err 0 116.22 2.18 25.43 7.32 1585 30 1 119.84 1.94 25.87 10.19 1544 23 2 110.63 2.07 30.16 15.30 1475 36 3 116.02 2.22 3.33 13.79 1548 33 4 114.43 2.09 10.74 13.93 1635 38 5 112.37 2.00 25.73 9.77 1525 28 mV/fC mV ENC VDD = 4.2V Chip Gain g_err Offset o_err Noise n_err 0 110.07 1.97 48.79 7.74 1696 36 1 114.03 2.14 48.09 10.38 1654 27 2 103.96 1.95 53.77 14.14 1575 38 3 108.45 2.10 34.91 12.35 1653 33 4 106.78 2.15 46.67 10.18 1739 45 5 105.73 1.77 49.74 8.71 1647 33 mV/fC mV ENC bench supply, set to 3.5 and 4.0V on sense lines Chip Gain g_err Offset o_err Noise n_err 0 114.37 1.75 38.22 7.52 1535 38 1 118.07 2.11 37.63 11.30 1494 26 2 108.61 2.06 43.93 15.93 1398 32 3 114.33 2.60 19.97 10.69 1449 29 4 112.51 2.36 29.00 12.68 1526 40 5 110.28 2.16 39.15 10.07 1450 29 mV/fC mV ENC add some copper tape to join sector to cooling pipe Chip Gain g_err Offset o_err Noise n_err 0 113.96 1.99 40.02 7.06 1530 35 1 117.56 2.25 40.35 11.33 1492 28 2 108.05 1.98 42.69 18.52 1404 32 3 113.11 2.36 23.12 12.45 1457 30 4 111.45 2.08 34.23 11.85 1525 48 5 109.28 1.84 42.43 9.54 1457 24 mV/fC mV ENC add 100nF to Vcc and AGnd and to Vdd and DGnd set to 3.5 and 4.0V from SCT LV Chip Gain g_err Offset o_err Noise n_err 0 112.41 1.81 42.05 7.68 1674 40 1 116.43 2.12 42.07 10.66 1618 29 2 106.80 1.87 46.31 15.50 1532 33 3 111.74 2.50 27.44 12.18 1597 29 4 109.86 2.21 38.52 11.09 1674 37 5 108.00 2.15 47.07 9.68 1596 27 mV/fC mV ENC edge detect, any hit Chip Gain g_err Offset o_err Noise n_err 0 108.64 1.73 53.94 6.50 1700 41 1 111.84 1.91 56.24 10.57 1652 28 2 101.53 1.65 64.82 12.68 1575 34 3 104.73 2.08 50.04 12.55 1657 33 4 102.43 2.02 63.59 9.19 1750 47 5 102.63 1.80 64.59 8.88 1656 27 mV/fC mV ENC same as above, but the grounding wire connected to AGND instead of DGND Chip Gain g_err Offset o_err Noise n_err 0 108.22 2.18 54.06 7.20 1904 33 1 111.57 2.12 55.91 9.85 1887 29 2 101.29 1.83 62.95 13.20 1826 34 3 104.63 1.90 49.59 11.15 1943 41 4 102.34 2.42 63.31 9.84 2053 50 5 102.35 2.11 64.59 9.05 1953 33 mV/fC mV ENC grounding wire disconnected Chip Gain g_err Offset o_err Noise n_err 0 109.16 1.69 51.97 7.58 2826 79 1 112.16 1.98 56.13 10.12 2705 38 2 101.33 1.73 63.65 12.67 2607 31 3 104.84 1.93 49.37 10.94 2682 46 4 102.88 2.34 62.34 10.45 2816 75 5 102.08 1.89 65.56 9.61 2700 199 mV/fC mV ENC grounding wire connected to dgnd Chip Gain g_err Offset o_err Noise n_err 0 108.63 2.02 53.73 6.67 1716 45 1 111.82 2.03 56.15 10.35 1670 30 2 101.61 1.70 64.29 11.76 1593 37 3 105.00 1.86 49.10 12.01 1672 32 4 102.61 2.30 64.24 9.38 1765 50 5 102.58 1.92 65.42 8.80 1681 27 mV/fC mV ENC data compression changed to 2 (01X) Chip Gain g_err Offset o_err Noise n_err 0 113.17 1.88 37.93 6.93 1678 35 1 116.57 2.25 39.67 10.43 1631 30 2 107.21 1.95 40.73 18.51 1540 32 3 112.20 2.06 23.69 13.47 1600 31 4 110.63 2.21 34.39 12.76 1685 33 5 108.65 2.30 44.81 9.40 1606 31 mV/fC mV ENC 17-dec-99 SCTLV-2 powered by bench supply Chip Gain g_err Offset o_err Noise n_err 0 112.79 1.68 45.63 7.96 1671 30 1 116.69 2.02 47.42 10.89 1639 30 2 106.86 1.98 55.28 15.90 1560 31 3 111.86 2.24 30.54 11.98 1625 32 4 109.66 2.19 44.74 10.58 1704 44 5 107.78 1.93 52.75 9.38 1611 27 mV/fC mV ENC repeated after 30 minutes Chip Gain g_err Offset o_err Noise n_err 0 113.10 1.72 43.60 7.81 1634 32 av = 1592 1 117.15 1.97 45.16 9.66 1598 26 2 107.36 1.73 49.86 15.15 1511 32 3 112.13 2.00 28.81 12.72 1577 31 4 110.14 2.21 40.86 11.69 1657 47 5 108.36 2.01 49.89 9.65 1577 26 mV/fC mV ENC remove shielding from below module, use adhesive copper tape to connect (?) sector to cooling pipe, retain grounding wire cooling pipe to DGND Chip Gain g_err Offset o_err Noise n_err 0 106.74 1.84 69.36 7.25 1782 30 1 110.32 2.06 71.29 10.48 1765 24 2 100.24 2.25 77.22 14.63 1688 38 3 104.02 1.96 59.64 11.82 1781 33 4 101.93 2.21 72.72 11.05 1869 48 5 101.14 1.90 76.10 10.00 1777 27 mV/fC mV ENC remove links between sector and cooling pipe, still with grounding wire connected pipe to dgnd Chip Gain g_err Offset o_err Noise n_err 0 107.27 1.97 66.53 7.58 1869 32 1 110.88 1.90 68.59 10.09 1840 26 2 100.59 1.75 72.86 19.36 1759 38 3 104.59 1.75 56.38 10.78 1848 23 4 102.24 2.12 70.58 10.15 1947 46 5 101.80 1.90 72.13 9.24 1874 41 mV/fC mV ENC