/*
	SystemTest Configuration file: example ELECTRO configuration
	============================================================
       
        Note:  no BILED channels in use indicated by id = -1.  With the
        ELECTRO configuration we connect, by default, two sets of clock
        and control signals to each module, one of which is used depending
        on the state of SELECT.  There is not assumed a redundant link
        between diferent modules.

*/
       DETECTOR  LV     SLOG      RSLOG     BiLED  RBiLED MuSTARD          Module
       id pr ac  cr ch  id ch pg  id ch pg  id ch  id ch  id s0 s1 d0 d1   Filename
----------------------------------------------------------------------------------------------------
Module  0  1  1   0  0   0  0  0   0  1  0  -1  1  -1  2   0  0  1 20 20   st1
Module  1  1  1   0  1   0  2  0   0  3  0  -1  2  -1  3   0  2  3 20 20   st2
Module  2  1  1   0  2   0  4  0   0  5  0  -1  3  -1  4   0  4  5 20 20   mel6 
Module  3  0  1   0  3   0  6  0   0  7  0  -1 -1  -1 -1   0  6  7 15 15   mel4
Module  4  0  1   0  4   0  6  0   0  7  0  -1 -1  -1 -1   0  8  9 15 15   mel8
Module  5  0  1   0  5   0  6  0   0  7  0  -1 -1  -1 -1   0 10 11 15 15   val2
/*END*/