//==========================================
//
//  Prereq  -- filter module for selecting events by Trigger
//
//  Authors: Kevin McFarland, Kirsten Tollefson
//
//==========================================

#ifdef DEFECT_OLD_IOSTREAM_HEADERS
#include <iostream>
#include <iomanip>
#else
#include <iostream>
#include <iomanip>
#endif

#ifndef DEFECT_NO_STDLIB_NAMESPACES
using std::dec;
using std::setw;
using std::hex;
using std::cout;
using std::endl;
using std::string;
#endif

#include <vector>
using std::vector;

#include <string>
#include <list>
using std::list;
using std::string;

#include "Level3Mods/Prereq.hh"

#include "StorableBanks/EVCL_StorableBank.hh"
#include "TriggerObjects/TFRD_StorableBank.hh"
#include "TriggerObjects/TL2D_StorableBank.hh"
#include "TriggerObjects/TL3D_StorableBank.hh"
#include "Level3Objects/Level3ModuleResults.hh"
#include "Edm/EventRecord.hh"
#include "Edm/ConstHandle.hh"
#include "AbsEnv/AbsEnv.hh"


//-------------------
// ConsumerServerLogger headers --  used here for trigger bits
//-------------------
extern "C" {
#include "ConsumerInterface/l3_cs_pointer_space.h"
}

const long Prereq::_defaultRandomSeed = 1485669224;

Prereq::Prereq( const char* const theName,
                                      const char* const theDescription )
  : AppFilterModule( theName, theDescription ),
    _reportedMissingL1Bits(false),
    _reportedMissingL2Bits(false),
    _GetL1TriggerBitsFromTFRD("GetL1TriggerBitsFromTFRD",this,true),
    _GetL1TriggerBitsFromTL2D("GetL1TriggerBitsFromTL2D",this,false),
    _GetL3TriggerBitsFromTL3D("GetL3TriggerBitsFromTL3D",this,false),
    _UseUnprescaledBits("UseUnprescaledBits",this,false),
    _CompareFullName("CompareFullName",this,false),
    _L1TriggerBits("L1TriggerBits",this, 0, 0, 0),
    _L2TriggerBits("L2TriggerBits",this, 0, 0, 0),
    _L3TriggerBits("L3TriggerBits",this, 0, 0, 0),
    _databaseForTrigger("databaseForTrigger",this,"ofotl_prd_read"),
    _printTriggerMap("printTriggerMap",this,false),
    _printTriggerSummary("printTriggerSummary",this,false),
    _L1TriggerNames("L1TriggerNames",this, 0),
    _L2TriggerNames("L2TriggerNames",this, 0),
    _L3TriggerNames("L3TriggerNames",this, 0),
    _TriggerTableNames("TriggerTableNames",this, 0),
    _L1TriggerIds("L1TriggerIds",this, 0),
    _L2TriggerIds("L2TriggerIds",this, 0),
    _L3TriggerIds("L3TriggerIds",this, 0),
    _L1Accept("L1Accept",this,true),
    _L2Accept("L2Accept",this,true),
    _L3Accept("L3Accept",this,true),
    _debug("debug",this,false),
    _useEvclBits("useEvclBits",this,false),
    _integralPrescale("integralPrescale",this,1),
    _randomPrescale("randomPrescale",this,1.),
    _randomSeed("RandomSeed",this,_defaultRandomSeed),
    _randomEngine(0),
    _flatGenerator(0),
    _notPrintedYet(true),
    _bankType("bankType", this, "" )
{
  // Define parameters for talk-to
//----------------------------------------
// trigger bank types
    _bankType.addDescription( 
 "\tSelect the TL2D bank type from which to select the L1/L2 bits.\n\
          The syntax of the command is: \n\
          bankType set <choice>  where <choice> is the string <Simulated Trigger Bank> for MC \n\
          and nothing for real data. ") ;



  // -----------------------------
  _GetL1TriggerBitsFromTFRD.addDescription(
"\tGet Level-1 Trigger Bits from TFRD Bank (default true)");
  _GetL1TriggerBitsFromTL2D.addDescription(
"\tGet Level-1 Trigger Bits from TL2D Bank (default false)");
  _GetL3TriggerBitsFromTL3D.addDescription(
"\tGet Level-3 Trigger Bits from TL3D Bank instead of Level3ModuleResults object (default false; note that if Level3ModuleResults is absent, then fallback is to look for TL3D)");
  _UseUnprescaledBits.addDescription(
"\tUse L1 trigger bits from FRED before prescale \n\t\t(default for seeded triggering is false; \n\t\t setting true is meaningless without setting GetL1TriggerBitsFromTFRD also)");
  _CompareFullName.addDescription(
"\tWhen comparing trigger names, only put wildcard at end. (default false");
  _L1TriggerBits.addDescription(
" \tList of Level-1 Trigger Bits to Accept (default none)");
  _L2TriggerBits.addDescription(
" \tList of Level-2 Trigger Bits to Accept (default none)");
  _L3TriggerBits.addDescription(
" \tList of Level-3 Trigger Bits to Accept (default none)");
  _L1TriggerIds.addDescription(
" \tList of Level-1 Trigger Ids to Accept (default none)");
  _L2TriggerIds.addDescription(
" \tList of Level-2 Trigger Ids to Accept (default none)");
  _L3TriggerIds.addDescription(
" \tList of Level-3 Trigger Ids to Accept (default none)");
  _databaseForTrigger.addDescription(
" \tName of the reader database account to use for trigger lookup (default database_oracle_offline)");
  _printTriggerMap.addDescription(
" \tPrint out trigger map at the beginning of each run (default true)");
  _printTriggerSummary.addDescription(
" \tPrint out trigger accounting information at the end of each run (default false)");
  _L1TriggerNames.addDescription(
" \tList of Level-1 Trigger Bits to Accept (default none)");
  _L2TriggerNames.addDescription(
" \tList of Level-2 Trigger Bits to Accept (default none)");
  _L3TriggerNames.addDescription(
" \tList of Level-3 Trigger Bits to Accept (default none)");
  _L3TriggerNames.addDescription(
" \tList of Trigger Tables (default none)");
  _L1Accept.addDescription(
" \tAccept L1 without Prerequisite (default false)");
  _L2Accept.addDescription(
" \tAccept L2 without Prerequisite (default false)");
  _L3Accept.addDescription(
" \tAccept L3 without Prerequisite (default false)");
  _debug.addDescription(
" \tDebug flag (default false)");
  _useEvclBits.addDescription(
" \tUse trigger summary bits from EVCL instead of TL2D, implemented for backwords compatibility (default false)");
  _integralPrescale.addDescription(
" \tPrescale trigger results by allowing a pass EXACTLY only once every N calls with a randomly generated initial seed (default 1, no prescale)");
  _randomPrescale.addDescription(
" \tPrescale trigger results by event-by-event random selection (default 1., no prescale)");
  _randomSeed.addDescription(
" \tSeed for the random number generator");



  commands()->append(&_GetL1TriggerBitsFromTFRD);
  commands()->append(&_GetL1TriggerBitsFromTL2D);
  commands()->append(&_GetL3TriggerBitsFromTL3D);
  commands()->append(&_UseUnprescaledBits);
  commands()->append(&_CompareFullName);
  commands()->append(&_L1TriggerBits);
  commands()->append(&_L2TriggerBits);
  commands()->append(&_L3TriggerBits);
  commands()->append(&_L1TriggerIds);
  commands()->append(&_L2TriggerIds);
  commands()->append(&_L3TriggerIds);
  commands()->append(&_databaseForTrigger);
  commands()->append(&_printTriggerMap);
  commands()->append(&_printTriggerSummary);
  commands()->append(&_L1TriggerNames);
  commands()->append(&_L2TriggerNames);
  commands()->append(&_L3TriggerNames);
  commands()->append(&_TriggerTableNames);
  commands()->append(&_L1Accept);
  commands()->append(&_L2Accept);
  commands()->append(&_L3Accept);
  commands()->append(&_debug);
  commands()->append(&_useEvclBits);
  commands()->append(&_integralPrescale);
  commands()->append(&_randomPrescale);
  commands()->append(&_randomSeed);
  commands()->append(&_bankType);

}

Prereq::~Prereq() 
{
  if (_randomEngine) delete _randomEngine;
  if (_flatGenerator) delete _flatGenerator;
}

AppResult Prereq::beginJob( AbsEvent* aJob )
{

  // Initialize the random number engine with a seed
  _randomEngine = new Ranlux64Engine(_randomSeed.value());
  // Initialize the flat random number generator (0,1) with our engine --
  // passing as a reference tells it to leave memory cleanup of the
  // engine to us
  _flatGenerator = new RandFlat(*_randomEngine,0.,1.);

  // Initialize a random count
  _cyclicCount = (_integralPrescale.value())*float(_flatGenerator->fire());

  errlog.setSubroutine("Prereq::beginJob");
  if ( _integralPrescale.value() > 1 ||
       _randomPrescale.value() < 1. )
    {
      errlog(ELwarning,
             "Prereq PRESCALE ACTIVE; will cut events")
               << endmsg;
    }

  // rationalize autoaccepts given other inputs
  
  if (_L1TriggerNames.size()+_L1TriggerBits.size()+_L1TriggerIds.size() > 0)
    _L1Accept.set(false);
  if (_L2TriggerNames.size()+_L2TriggerBits.size()+_L2TriggerIds.size() > 0)
    _L2Accept.set(false);
  if (_L3TriggerNames.size()+_L3TriggerBits.size()+_L3TriggerIds.size() > 0)
    _L3Accept.set(false);

  return AppResult::OK;
}

AppResult Prereq::beginRun( AbsEvent* aRun )
{
  if (_printTriggerSummary.value()) {
    // Initialize counters
    _L1Counter.assign(HepSymMatrix(L1_BITMASK_WORDS*BITMASK_BITS,0));
    _L2Counter.assign(HepSymMatrix(L2_BITMASK_WORDS*BITMASK_BITS,0));
    _L3Counter.assign(HepSymMatrix(L3_BITMASK_WORDS*BITMASK_BITS,0));
     // Moved this line inside if statement so Prereq would not access
     // offline database unless asked to - KAT 12/27/01
    _databaseTriggerMap = new TriggerMap(_databaseForTrigger.value());
    _notPrintedYet = true;
  }
  
  // Construct trigger bit lists from the OR of the bits, ids, names
  _L1BitList.clear();
  _L2BitList.clear();
  _L3BitList.clear();
  // First copy from bit list
  for (AbsParmList<int>::ConstIterator 
         bit=_L1TriggerBits.begin(); 
       bit!=_L1TriggerBits.end(); bit++)
    _L1BitList.push_back(*bit);
  for (AbsParmList<int>::ConstIterator 
         bit=_L2TriggerBits.begin(); 
       bit!=_L2TriggerBits.end(); bit++)
    _L2BitList.push_back(*bit);
  for (AbsParmList<int>::ConstIterator 
         bit=_L3TriggerBits.begin(); 
       bit!=_L3TriggerBits.end(); bit++)
    _L3BitList.push_back(*bit);

  for (AbsParmList<int>::ConstIterator 
         bit=_L3TriggerBits.begin(); 
       bit!=_L3TriggerBits.end(); bit++)
    _L3BitList.push_back(*bit);
  
  // Set the default values for teh TriggerTable pass variable
  // if a trigger table selection exists then set to false by default

  if (_TriggerTableNames.size()==0) _PassTriggerTable = true;
  else _PassTriggerTable = false;

  // Now add from trigger names or ids, but only if any are requested...
  //  (this database access code takes some time)

  // Get mapping of Level1 and Level2 triggers from online database
  // given a particular run number

   
  if ( _L1TriggerNames.size()!=0 || 
       _L2TriggerNames.size()!=0 || 
       _L3TriggerNames.size()!=0 ||
       _L1TriggerIds.size()!=0 || 
       _L2TriggerIds.size()!=0 || 
       _L3TriggerIds.size()!=0 ||
       _TriggerTableNames.size()!=0)
    { 

      // The printSummary method also needs the TriggerMap information so
      // if this is true have already done this above so skip it here KAT 12/27/01
      if (!_printTriggerSummary.value()) {
          _databaseTriggerMap = new TriggerMap(_databaseForTrigger.value());
      }

      // print out for user benefit
      if ( _printTriggerMap.value() )
        {
          std::cout << "Prereq:: beginRun, Trigger list for run " 
               << gblEnv->runNumber() << std::endl;
          _databaseTriggerMap->print(); 
        }
      
      for (AbsParmList<string>::ConstIterator 
             name=_L1TriggerNames.begin(); 
           name!=_L1TriggerNames.end(); name++)
        {
	  vector <int> L1NamedBits; 
	  if (_CompareFullName.value())
	    L1NamedBits = _databaseTriggerMap->getBitsFromFullName(*name,1);
	  else
	    L1NamedBits = _databaseTriggerMap->getBits(*name,1);

          for (vector<int>::const_iterator
                 bit=L1NamedBits.begin();
               bit!=L1NamedBits.end(); bit++)
            _L1BitList.push_back(*bit);
        }
      for (AbsParmList<string>::ConstIterator 
             name=_L2TriggerNames.begin(); 
           name!=_L2TriggerNames.end(); name++)
        {
	  vector <int> L2NamedBits; 
	  if (_CompareFullName.value())
	    L2NamedBits = _databaseTriggerMap->getBitsFromFullName(*name,2);
	  else
	    L2NamedBits = _databaseTriggerMap->getBits(*name,2);
          for (vector<int>::const_iterator
                 bit=L2NamedBits.begin();
               bit!=L2NamedBits.end(); bit++)
            _L2BitList.push_back(*bit);
        }
      for (AbsParmList<string>::ConstIterator 
             name=_L3TriggerNames.begin(); 
           name!=_L3TriggerNames.end(); name++)
        {
	  vector <int> L3NamedBits; 
	  if (_CompareFullName.value())
	    L3NamedBits = _databaseTriggerMap->getBitsFromFullName(*name,3);
	  else
	    L3NamedBits = _databaseTriggerMap->getBits(*name,3);
          for (vector<int>::const_iterator
                 bit=L3NamedBits.begin();
               bit!=L3NamedBits.end(); bit++)
            _L3BitList.push_back(*bit);
        }

     for (AbsParmList<int>::ConstIterator 
             id=_L1TriggerIds.begin(); 
             id!=_L1TriggerIds.end(); id++)
        {
          _L1BitList.push_back(_databaseTriggerMap->getBit(*id,1));
        }
     for (AbsParmList<int>::ConstIterator 
             id=_L2TriggerIds.begin(); 
             id!=_L2TriggerIds.end(); id++)
        {
          _L2BitList.push_back(_databaseTriggerMap->getBit(*id,2));
        }
     for (AbsParmList<int>::ConstIterator 
             id=_L3TriggerIds.begin(); 
             id!=_L3TriggerIds.end(); id++)
        {
          _L3BitList.push_back(_databaseTriggerMap->getBit(*id,3));
        }
      for (AbsParmList<string>::ConstIterator 
             name=_TriggerTableNames.begin(); 
           name!=_TriggerTableNames.end(); name++)
        {
	  string upperName = *name;
	  int i = upperName.size();
	  while (--i >= 0) upperName[i] = toupper(upperName[i]);

	  string upperTriggerTableName = _databaseTriggerMap->triggerTableName();
	  i = upperTriggerTableName.size();
	  while (--i >=0 ) upperTriggerTableName[i] = toupper(upperTriggerTableName[i]);

	  if (upperTriggerTableName.find(upperName) != string::npos ) _PassTriggerTable = true;
	  //std::cout << upperTriggerTableName << " " << upperName << endl;
        }
    }

   return AppResult::OK;
}

AppResult Prereq::event( AbsEvent* anEvent ) {

  bool Pass, PassLevel1, PassLevel2, PassLevel3;

  //
  // First handle any active prescales
  //

  bool PassPrescale = true;

  if (_integralPrescale.value() > 1)
    {
      if (++_cyclicCount < _integralPrescale.value())
        PassPrescale = false;
      else
        _cyclicCount = 0; // passed, so reset count
    }

  if (_randomPrescale.value() < 1.)
    {
      if (float(_flatGenerator->fire()) > _randomPrescale.value())
        PassPrescale = false;
    }

  if (!PassPrescale)  // if failed prescale, just exit
    {
      this->setPassed(PassPrescale);
      return AppResult::OK;
    }


  //
  // Now Examine Trigger Masks
  //
  int4 L1Trig[L1_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4)];
  for (int iw=0; iw<L1_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4) ; iw++)
    L1Trig[iw]=0;
  int4 L2Trig[L2_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4)];
  for (int iw=0; iw<L2_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4) ; iw++)
    L2Trig[iw]=0;
  // get Number of L2 words from TL2D:
  // first get a hold of TL2D:
  
  EventRecord::ConstIterator TL2D_iter( anEvent, "TL2D_StorableBank" );
  ConstHandle<TL2D_StorableBank> tl2d( TL2D_iter );

  //  errlog.setSubroutine("Prereq::event");
  //if ( TL2D_iter.is_valid() ){
  //  if (tl2d->getNL2Words() > L2_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4))
  //    errlog(ELsevere,
  //	     "Num of L2 bits in bank greater than Num L2 bits in CSL") 
  //	       << endmsg;
  //    for (int iw=0; iw< tl2d->getNL2Words() ; iw++)
  //     L2Trig[iw]=0;    
  //};
 
  if ( _useEvclBits.value() )
    {
      EventRecord::ConstIterator EVCL_iter( anEvent, "EVCL_StorableBank" );
      if ( EVCL_iter.is_valid() )
        {
          ConstHandle<EVCL_StorableBank> evcl( EVCL_iter );
          // parse triggers according to Run 1 EVCL spec; note ugly hardcoding
          L1Trig[0] = ( evcl->trigger_summary1() >> 16 ) ;
          L1Trig[1] = 0;
          L2Trig[0] = evcl->trigger_summary2();
          L2Trig[1] = ( evcl->trigger_summary3() & 0x3ff );
          L2Trig[2] = 0;
          L2Trig[3] = 0;
          
          if ( _debug.value() )
            {
              std::cout << "EVCL bank trigger number = " << dec 
                   << evcl->trigger_number() << std::endl;
              std::cout << "  L1 Trig Mask = " << std::hex << setw(4) 
                   << L1Trig << std::dec << std::endl;                
              std::cout << "  L1 Trig Accept Bits: ";
              for (vector<int>::const_iterator 
                     bit=_L1BitList.begin(); 
                   bit!=_L1BitList.end(); bit++)
                std::cout << *bit << ",";
              std::cout << std::endl;
              std::cout << "  L2 Trig Mask = " << std::hex << setw(3) << 
                L2Trig[1] << setw(8) << L2Trig[0];
              std::cout << "  L2 Trig Accept Bits: ";
              for (vector<int>::const_iterator 
                     bit=_L2BitList.begin(); 
                   bit!=_L2BitList.end(); bit++)
                std::cout << *bit << ",";
              std::cout << std::endl;
            } // debug
        } // found valid EVCL
      else
        {
          errlog.setSubroutine("Prereq::event");
          if ( !_reportedMissingL1Bits && !_L1Accept.value() ) 
            {
              errlog(ELsevere,
                     "L1/2 Trigger Bits not in event: no EVCL") 
                       << endmsg;
              _reportedMissingL1Bits = true;
            }
          else
            errlog(ELwarning,
                   "L1/2 Trigger Bits still not in event: no EVCL") 
                     << endmsg;
        } // did not find valid EVCL
    } // useEvclBits
  else // get data from Trigger Banks (TFRD and/or TL2D)
    {
      bool foundL1Bits = false;
      //
      // Level-1 Trigger Bits From TFRD
      //
      if ( _GetL1TriggerBitsFromTFRD.value() )
        {
//           EventRecord::ConstIterator TFRD_iter( anEvent, 
//                                                 "TFRD_StorableBank" );
//           if ( TFRD_iter.is_valid() )
//             {

            for(EventRecord::ConstIterator TFRD_iter(anEvent, "TFRD_StorableBank")
                    ; TFRD_iter.is_valid() ; ++TFRD_iter ) {
              ConstHandle<TFRD_StorableBank> tfrd( TFRD_iter );
              if (tfrd->description() != _bankType.value()) continue;
              if (tfrd->description() == _bankType.value()) {

                  foundL1Bits = true;
                  for (int iw=0; 
                       iw<L1_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4) ; 
                       iw++) 
                      {
                          int ibit = 32*iw;
                          if ( _UseUnprescaledBits.value() )
                              L1Trig[iw] = tfrd->getL1NoPrescaleTrigDecision(ibit);
                          else
                              L1Trig[iw] = tfrd->getL1PrescaleTrigDecision(ibit);
                      }
                  if ( _debug.value() )
                      {
                          std::cout << "  TFRD L1 Trig Mask = " << std::hex << setw(8);
                          for (int iw=0; 
                               iw<L1_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4); 
                               iw++)
                              std::cout << L1Trig[iw] << " ";
                          std::cout << std::dec << std::endl;                
                          std::cout << "  TFRD L1 Trig Accept Bits: ";
                          for (vector<int>::const_iterator 
                                   bit=_L1BitList.begin(); 
                               bit!=_L1BitList.end(); bit++)
                              std::cout << *bit << ",";
                          std::cout << std::endl;
                      } // debug
              } // if (tfrd->description() == _bankType.value())
            } // valid TFRD
        } // use TRFRD
      //
      // Or get Level-1 Trigger Bits from TL2D
      //
      else if ( _GetL1TriggerBitsFromTL2D.value() )
        {
//           EventRecord::ConstIterator TL2D_iter( anEvent, 
//                                                 "TL2D_StorableBank" );
//           if ( TL2D_iter.is_valid() )
//            {

            for(EventRecord::ConstIterator TL2D_iter(anEvent, "TL2D_StorableBank")
                    ; TL2D_iter.is_valid() ; ++TL2D_iter ) {

              ConstHandle<TL2D_StorableBank> tl2d( TL2D_iter );
              if (tl2d->description() != _bankType.value()) continue;
              if (tl2d->description() == _bankType.value()) {
                  foundL1Bits = true;
                  
                  for (int iw=0; 
                       iw<L1_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4) ; 
                       iw++) 
                      {
                          int ibit = 32*iw;
                          L1Trig[iw] = tl2d->getL1TriggerBit(ibit);
                      }
                  if ( _debug.value() )
                      {
                          std::cout << "  TL2D L1 Trig Mask = " << std::hex << setw(8);
                          for (int iw=0; 
                               iw<L1_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4); 
                               iw++)
                              std::cout << L1Trig[iw] << " ";
                          std::cout << std::dec << std::endl;                
                          std::cout << "  TL2D L1 Trig Accept Bits: ";
                          for (vector<int>::const_iterator 
                                   bit=_L1BitList.begin(); 
                               bit!=_L1BitList.end(); bit++)
                              std::cout << *bit << ",";
                          std::cout << std::endl;
                      } // debug
              } // if (tl2d->description() == _bankType.value())
            } // found TL2D
        } // use TL2D

      if ( !foundL1Bits && !_L1Accept.value() )
        {
          errlog.setSubroutine("Prereq::event");
          if ( !_reportedMissingL1Bits ) 
            {
              errlog(ELsevere,
                     "L1 Trigger Bits not in event: no TFRD/TL2D") 
                       << endmsg;
              _reportedMissingL1Bits = true;
            }
          else
            errlog(ELwarning,
                   "L1 Trigger Bits still not in event: no TFRD/TL2D") 
                     << endmsg;
        }
      
      // Now Get L2 Trigger Bits from TL2D
      bool foundL2Bits = false;
//       EventRecord::ConstIterator TL2D_iter( anEvent, 
//                                             "TL2D_StorableBank" );
//       if ( TL2D_iter.is_valid() )
//         {
      for(EventRecord::ConstIterator TL2D_iter(anEvent, "TL2D_StorableBank")
              ; TL2D_iter.is_valid() ; ++TL2D_iter ) {

          ConstHandle<TL2D_StorableBank> tl2d( TL2D_iter );
          if (tl2d->description() != _bankType.value()) continue;
          if (tl2d->description() == _bankType.value()) {
              foundL2Bits = true;   
              for (int iw=0; 
		   //                   iw<L2_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4) ; 
		   //now getting the number of words from TL2D
		   iw < tl2d->getNL2Words() ;
                   iw++) {
                  int ibit = 32*iw;
                  L2Trig[iw] = tl2d->getL2TriggerBit(ibit);
              } 
              
              
              if ( _debug.value() )
                  {
                      std::cout << "  TL2D L2 Trig Mask = " << std::hex << setw(8); 
                      for (int iw=0; 
			   //			  iw<L2_BITMASK_WORDS*BITMASK_BITS/8/sizeof(int4); 
			   //now getting the number of words from TL2D
			   iw < tl2d->getNL2Words() ;
                           iw++)
                          std::cout << L2Trig[iw] << " ";
                      std::cout << std::dec << std::endl;
                      std::cout << "  TL2D L2 Trig Accept Bits: ";
                      for (vector<int>::const_iterator 
                               bit=_L2BitList.begin(); 
                           bit!=_L2BitList.end(); bit++)
                          std::cout << *bit << ",";
                      std::cout << std::endl;
                  } // debug
          } // if (tl2d->description() == _bankType.value())
        } // found TL2D 
      
      if ( !foundL2Bits && !_L2Accept.value() )
        {
          errlog.setSubroutine("Prereq::event");
          if ( !_reportedMissingL2Bits ) 
            {
              errlog(ELsevere,
                     "L2 Trigger Bits not in event: no TL2D") 
                       << endmsg;
              _reportedMissingL2Bits = true;
            }
          else
            errlog(ELwarning,
                   "L2 Trigger Bits still not in event: no TL2D") 
                     << endmsg;
        }

    } //input method (trigger banks)

  if (_printTriggerSummary.value()) {
    //Increment counters
    for (int i = 0; i < L1_BITMASK_WORDS*BITMASK_BITS; i++) {
      for (int j = i; j < L1_BITMASK_WORDS*BITMASK_BITS; j++) {
	if (L1Trig[i/(sizeof(int4)*8)] & 
	    static_cast<int4>(1<<(i%(sizeof(int4)*8))) &&
	    L1Trig[j/(sizeof(int4)*8)] 
	    & static_cast<int4>(1<<(j%(sizeof(int4)*8))))
	  _L1Counter[i][j]++;
      }
    }
  }

  PassLevel1 = false;
  if ( _L1Accept.value() )
    PassLevel1 = true;
  else
    {
      for (vector<int>::const_iterator 
             bit=_L1BitList.begin(); 
           bit!=_L1BitList.end(); bit++)
        {
          //std::cout << "Testing L1 bit " << *bit << std::endl;
          //std::cout << "   comparing " << std::hex << L1Trig[*bit/(sizeof(int4)*8)]
          //     << " to " << static_cast<int4>(1<<((*bit)%(sizeof(int4)*8)))
          //     << std::dec << std::endl;
          if (*bit >= 0) // valid bit?
            {
              if ( L1Trig[*bit/(sizeof(int4)*8)] 
                   & static_cast<int4>(1<<((*bit)%(sizeof(int4)*8))))
                PassLevel1 = true;
            }
        }
    }
  
  if (_printTriggerSummary.value()) {
    //Increment counters
    for (int i = 0; i <tl2d->getNL2Words()*BITMASKS_PER_LONGWORD*BITMASK_BITS ; i++) {
      for (int j = i; j < tl2d->getNL2Words()*BITMASKS_PER_LONGWORD*BITMASK_BITS; j++) {
	if (L2Trig[i/(sizeof(int4)*8)] & 
	    static_cast<int4>(1<<(i%(sizeof(int4)*8))) &&
	    L2Trig[j/(sizeof(int4)*8)] 
	    & static_cast<int4>(1<<(j%(sizeof(int4)*8))))
	_L2Counter[i][j]++;
      }
    }
  }

  PassLevel2 = false;
  if ( _L2Accept.value() )
    PassLevel2 = true;
  else
    {
      for (vector<int>::const_iterator 
             bit=_L2BitList.begin(); 
           bit!=_L2BitList.end(); bit++)
        if (*bit >= 0) // valid bit?
          {
            if ( L2Trig[*bit/(sizeof(int4)*8)] 
                 & static_cast<int4>(1<<((*bit)%(sizeof(int4)*8))))
              PassLevel2 = true;
          }
    }
  
  // Level 3
    
  if ( _debug.value() )
    {
      // TL3D
      EventRecord::ConstIterator TL3D_iter( anEvent, "TL3D_StorableBank" );
      if ( TL3D_iter.is_valid() )
        {
          ConstHandle<TL3D_StorableBank> tl3d( TL3D_iter );
          std::cout << "  TL3D set bits: " ;
          for ( int ibit = 0; 
                (ibit < L3_BITMASK_WORDS*BITMASK_BITS)
                  && (ibit < tl3d->nPaths()) ; ibit++ )
            {
              if (tl3d->didPathPass(ibit)) std::cout << ibit << ", "; 
            }
          std::cout << std::endl;
          //tl3d->print();
        }
      //
      // Level3ModuleResults
      EventRecord::ConstIterator L3Results_iter( anEvent, 
                                                 "Level3ModuleResults" );
      if ( L3Results_iter.is_valid() )
        {
          ConstHandle<Level3ModuleResults> L3Results( L3Results_iter );
          int nPaths = L3Results->numberOfPath();
          std::cout << "Found a Level3ModuleResults object reporting " 
               << nPaths << " paths" << std::endl;
          for ( int ibit = 0; ibit < nPaths ; ibit++ )
            {
              if (L3Results->thisEventPassedPath(ibit)) 
                {
                  std::cout << ibit << ", ";
                }
              //else
              //  if (L3Results->thisEventExecutedPath(ibit))
              //    {
              //      std::cout << "FAILED" << ibit << ", ";
              //    }
            }
          std::cout << std::endl;
          //L3Results->print();
        }
      std::cout << "  L3 Trig Accept Bits: ";
      for (vector<int>::const_iterator 
             bit=_L3BitList.begin(); 
           bit!=_L3BitList.end(); bit++)
        std::cout << *bit << ",";
      std::cout << std::endl;
    } // debug

  if (_printTriggerSummary.value()) {
    bool foundL3Results = false;
    if ( !_GetL3TriggerBitsFromTL3D.value() )
      {
	// Level3ModuleResults
        EventRecord::ConstIterator L3Results_iter( anEvent, 
                                                   "Level3ModuleResults" );
        if ( L3Results_iter.is_valid() )
          {
	    foundL3Results = true;
            ConstHandle<Level3ModuleResults> L3Results( L3Results_iter );
            int nPaths = L3Results->numberOfPath();
            for (int i = 0; i < nPaths; i++) {
              for (int j = i; j < nPaths; j++) {
                if ( L3Results->thisEventPassedPath(i) > 0 &&
                     L3Results->thisEventPassedPath(j) > 0 )
                  _L3Counter[i][j]++;
              }
            }
          }
      }
    if ( !foundL3Results )
      {
        EventRecord::ConstIterator TL3D_iter( anEvent, "TL3D_StorableBank" );
        if ( TL3D_iter.is_valid() )
          {
            ConstHandle<TL3D_StorableBank> tl3d( TL3D_iter );
            for (int i = 0; i < L3_BITMASK_WORDS*BITMASK_BITS; i++) {
              for (int j = i; j < L3_BITMASK_WORDS*BITMASK_BITS; j++) {
                if ( tl3d->didPathPass(i) > 0 &&
                     tl3d->didPathPass(j))
                  _L3Counter[i][j]++;
              }
            }
          }
      } // fallback to TL3D
  }
  
  if ( _L3Accept.value() )
    {
      PassLevel3 = true;
    }
  else
    {
      PassLevel3 = false;
      bool foundL3Results = false;
      if ( !_GetL3TriggerBitsFromTL3D.value() )
        {
          EventRecord::ConstIterator L3Results_iter( anEvent, 
                                                     "Level3ModuleResults" );
          if ( L3Results_iter.is_valid() )
            {
	      foundL3Results = true;
              ConstHandle<Level3ModuleResults> L3Results( L3Results_iter );
              int nPaths = L3Results->numberOfPath();
              for (vector<int>::const_iterator 
                     bit=_L3BitList.begin(); 
                   bit!=_L3BitList.end(); bit++)
                {
                  if ( *bit >= 0 ) // valid bit, -1 is invalid 
                    {
                      if ( (L3Results->thisEventPassedPath(*bit)) > 0 )
                        PassLevel3 = true;
                    }
                }
            }
	}
      if ( !foundL3Results )
	// fall back to TL3D
        {
          EventRecord::ConstIterator TL3D_iter( anEvent, "TL3D_StorableBank" );
          if ( TL3D_iter.is_valid() )
            {
              ConstHandle<TL3D_StorableBank> tl3d( TL3D_iter );
              for (vector<int>::const_iterator 
                     bit=_L3BitList.begin(); 
                   bit!=_L3BitList.end(); bit++)
                {
                  if ( *bit >= 0 ) // valid bit, -1 is invalid 
                    {
                      if ( (tl3d->didPathPass(*bit)) > 0 )
                        PassLevel3 = true;
                    }
                }
              
            } // found TL3D
          else // have failed to find TL3D and Level3Results if asked
            {
	      errlog.setSubroutine("Prereq::event");
	      // Wait until we have a L3 trigger sim before we get too upset 
	      // about this for simulated data...
	      bool monteC = AbsEnv::instance()->monteFlag();
	      string missingBits;
	      if (  _GetL3TriggerBitsFromTL3D.value() )
		missingBits="L3 Trigger Bits not in event: no TL3D";
	      else
		missingBits="L3 Trigger Bits not in event: no Level3Results or TL3D";
	      if ( !_reportedMissingL3Bits && !monteC ) 
		{
		  errlog(ELsevere,missingBits)<< endmsg;
		  _reportedMissingL3Bits = true;
		}
	      else
		errlog(ELwarning,missingBits)<< endmsg;
            } // no L3 trig info found
        }
    } // not L3 Auto-accept
        
  Pass = PassLevel1 & PassLevel2 & PassLevel3 & _PassTriggerTable;
  if ( _debug.value() )
    {
      if (PassLevel1) std::cout << "  Passed Level1...";
      if (PassLevel2) std::cout << "  Passed Level2...";
      if (PassLevel3) std::cout << "  Passed Level3...";
      if (_PassTriggerTable) std::cout << "  Passed Trigger Table..."; 
      if (PassLevel1 || PassLevel2 || PassLevel3 || _PassTriggerTable) std::cout << std::endl;
    }
  this->setPassed(Pass);
  return AppResult::OK;
}
    
    
AppResult Prereq::endRun( AbsEvent* aRun )
{
  if (_printTriggerSummary.value()) {
    _printSummary();
    _notPrintedYet = false;
  }
  return AppResult::OK;
}
 
AppResult Prereq::endJob( AbsEvent* aJob )
{
  if (_printTriggerSummary.value() && _notPrintedYet) _printSummary();
  return AppResult::OK;
}

void Prereq::_printSummary() const {
  int grandCounter,lastHighestBit,highestBit,totalBits;

  std::cout << std::endl;
  std::cout << "Prereq: L1 trigger bits, names and events passing:\n\n";
  for (int i = 0; i < L1_BITMASK_WORDS*BITMASK_BITS; i++) {
    if ( _databaseTriggerMap->getNameFromBit(i,1) != "" )
      std::cout << i << " "
	   << _databaseTriggerMap->getNameFromBit(i,1) << " " 
	   << _L1Counter[i][i]
	   << std::endl;
  }
  std::cout << std::endl;

  //Figure out the lowest and highest bits for this print block:
  grandCounter = 0;
  lastHighestBit = 0;
  highestBit = 0;
  totalBits = 0;
  std::cout << "L1 correlation matrix:\n\n";
  while (grandCounter < L1_BITMASK_WORDS*BITMASK_BITS) {
    if (_databaseTriggerMap->getNameFromBit(grandCounter,1) != "" ) {
      highestBit = grandCounter;
      totalBits++;
    }
    if (totalBits == 7|| grandCounter == L1_BITMASK_WORDS*BITMASK_BITS - 1) {

      //Create header
      std::cout << std::setw(10) << "Bit #";
      for (int i = lastHighestBit; i <= highestBit; i++) {
	if (_databaseTriggerMap->getNameFromBit(i,1) != "" ) 
	  std::cout << std::setw(10) << i;
      }
      std::cout << endl << std::endl;

      for (int i = 0; i < L1_BITMASK_WORDS*BITMASK_BITS; i++) {
	if (i > highestBit) break;
	if (_databaseTriggerMap->getNameFromBit(i,1) != "" ) {
	  std::cout << std::setw(10) << i;
	  for (int j = lastHighestBit; j <= highestBit; j++) {
	    if (_databaseTriggerMap->getNameFromBit(j,1) != "") {
	      if (j >= i) std::cout << std::setw(10) << _L1Counter[i][j];
	      else std::cout << std::setw(10) << "";
	    }
	  }
	  std::cout << std::endl;
	}
      }      
      std::cout << std::endl;
      lastHighestBit = grandCounter+1;
      totalBits = 0;
    }
    grandCounter++;
  }
  std::cout << std::endl;
  
  std::cout << std::endl;
  std::cout << "Prereq: L2 trigger bits, names and events passing:\n\n";
  for (int i = 0; i < L2_BITMASK_WORDS*BITMASK_BITS; i++) {
    if (_databaseTriggerMap->getNameFromBit(i,2) != "")
      std::cout << i << " "
	   << _databaseTriggerMap->getNameFromBit(i,2) << " " 
	   << _L2Counter[i][i]
	   << std::endl;
  }
  std::cout << std::endl;

  //Figure out the lowest and highest bits for this print block:
  grandCounter = 0;
  lastHighestBit = 0;
  highestBit = 0;
  totalBits = 0;
  std::cout << "L2 correlation matrix:\n\n";
  while (grandCounter < L2_BITMASK_WORDS*BITMASK_BITS) {
    if (_databaseTriggerMap->getNameFromBit(grandCounter,2) != "") {
      highestBit = grandCounter;
      totalBits++;
    }
    if (totalBits == 7 || grandCounter == L2_BITMASK_WORDS*BITMASK_BITS - 1) {

      //Create header
      std::cout << std::setw(10) << "Bit #";
      for (int i = lastHighestBit; i <= highestBit; i++) {
	if (_databaseTriggerMap->getNameFromBit(i,2) != "") 
	  std::cout << std::setw(10) << i;
      }
      std::cout << endl << std::endl;

      for (int i = 0; i < L2_BITMASK_WORDS*BITMASK_BITS; i++) {
	if (i > highestBit) break;
	if (_databaseTriggerMap->getNameFromBit(i,2) != "") {
	  std::cout << std::setw(10) << i;
	  for (int j = lastHighestBit; j <= highestBit; j++) {
	    if (_databaseTriggerMap->getNameFromBit(j,2) != "") {
	      if (j >= i) std::cout << std::setw(10) << _L2Counter[i][j];
	      else std::cout << std::setw(10) << "";
	    }
	  }
	  std::cout << std::endl;
	}
      }      
      std::cout << std::endl;
      lastHighestBit = grandCounter+1;
      totalBits = 0;
    }
    grandCounter++;
  }
  std::cout << std::endl;
  
  std::cout << std::endl;
  std::cout << "Prereq: L3 trigger bits, names and events passing:\n\n";
  for (int i = 0; i < L3_BITMASK_WORDS*BITMASK_BITS; i++) {
    if (_databaseTriggerMap->getNameFromBit(i,3) != "")
      std::cout << i << " "
	   << _databaseTriggerMap->getNameFromBit(i,3) << " " 
	   << _L3Counter[i][i]
	   << std::endl;
  }
  std::cout << std::endl;

  //Figure out the lowest and highest bits for this print block:
  grandCounter = 0;
  lastHighestBit = 0;
  highestBit = 0;
  totalBits = 0;
  std::cout << "L3 correlation matrix:\n\n";
  while (grandCounter < L3_BITMASK_WORDS*BITMASK_BITS) {
    if (_databaseTriggerMap->getNameFromBit(grandCounter,3) != "") {
      highestBit = grandCounter;
      totalBits++;
    }
    if (totalBits == 7|| grandCounter == L3_BITMASK_WORDS*BITMASK_BITS - 1) {

      //Create header
      std::cout << std::setw(10) << "Bit #";
      for (int i = lastHighestBit; i <= highestBit; i++) {
	if (_databaseTriggerMap->getNameFromBit(i,3) != "") 
	  std::cout << std::setw(10) << i;
      }
      std::cout << endl << std::endl;

      for (int i = 0; i < L3_BITMASK_WORDS*BITMASK_BITS; i++) {
	if (i > highestBit) break;
	if (_databaseTriggerMap->getNameFromBit(i,3) != "") {
	  std::cout << std::setw(10) << i;
	  for (int j = lastHighestBit; j <= highestBit; j++) {
	    if (_databaseTriggerMap->getNameFromBit(j,3) != "") {
	      if (j >= i) std::cout << std::setw(10) << _L3Counter[i][j];
	      else std::cout << std::setw(10) << "";
	    }
	  }
	  std::cout << std::endl;
	}
      }      
      std::cout << std::endl;
      lastHighestBit = grandCounter+1;
      totalBits = 0;
    }
    grandCounter++;
  }
  std::cout << std::endl;
  
  return;
}
 
AppResult Prereq::abortJob( AbsEvent* aJob )
{
   return AppResult::OK;
}

AppModule*
Prereq::clone(const char* cloneName)
{
  return new Prereq(cloneName,"this module is a clone of Prereq");
}